Field
Embodiments described herein relate to a semiconductor memory device.
Description of the Related Art
In recent years, ReRAM (Resistive RAM) that utilizes as memory a variable resistance element whose resistance value is reversibly changed, has been proposed. Moreover, due to a structure in which the variable resistance element is provided between a sidewall of a word line extending parallel to a substrate and a sidewall of a bit line extending perpendicularly to the substrate in this ReRAM, further raising of integration level of a memory cell array has been enabled. In the memory cell array having such a structure, a select gate transistor is connected to a lower end of the bit line, and each of the bit lines is selectively connected to a global bit line by this select gate transistor.